[2074]
1. Implement the following function F =
Σ(0,3,5,6,7) using
[10]
- Decoder.
- Multiplexer.
- PLA.
2. Differentiate between PLA and
PAL.[10]
(half question combined in 10 marks)
3. Draw a block diagram, truth table and
logic circuit of 1*16 Demultiplexer and explain its working
principle.[10]
8. Design a 5 x 32 decoder with four 3 x 8
decoder with enable and one 2 x 4 decoder. Use block
diagrams only.[5]
9. Design and explain the Decimal adder
with truth table and suitable diagram.[5]
[2075]
1. Implement the following function F =
Σ(1, 2, 3, 4, 8) using
[10]
- Decoder.
- Multiplexer.
- PLA.
3.The following is a truth table of a
3-input,4 output combinational circuit. Tabulate the PAL
programming table for the circuit and mark for the circuit
and mark the fuses to be blown in a PAL diagram.
[10]
8. Implement half adder using 2-4
decoder.[5]
10. Design 4-bit even parity
generator.[5]
[2077]
2. Implement the following functions using
PLA [10]
- w (A, B, C, D) = Σ(2, 12, 13)
- x (A, B, C, D) = Σ(7, 8, 9, 10, 11, 12, 13, 14, 15)
-
y (A, B, C, D) = Σ(0, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 15)
- z (A, B, C, D) = Σ(1, 2, 8, 12, 13)
[2078]
2. Implement the following function F =
Σ(0, 2, 3, 4, 7) using
[10]
- Multiplexer.
- Decoder.
- PLA.
11. Differentiate between PLA and PAL.
Explain 4-bit magnitude comparator.[5]